This circuit presented in this post, an APD bias circuit, generates a low-noise bias voltage for avalanche photodiodes (APDs). The circuit employs a low-noise fixed-frequency PWM DC-DC boost converter with an inductor operating in discontinuous-current mode. A complete circuit is provided.
Avalanche photodiodes (APDs) are widely used in optical communication to convert optical data into electrical signal. Optical data signals are converted to a current signal by an APD and the current signal is converted to a voltage using a transimpedance amplifier (TIA) (Current-to-voltage amplifier). The APD and TIA are often packaged close or in the same module, providing a direct, low loss connection; important at high speed rates.he variable voltage controls the avalanche gain of the APD to optimize sensitivity in a fiber-optic receiver.
Applying a reverse-bias voltage across an APD junction creates an avalanche gain. To achieve satisfactory levels of sensitivity in an optical communication system, high avalanche gain is need and many APDs require high reverse-bias voltages in the 50V range to get desired gains.
APD+TIA needs support circuitry: High voltage biasing source. APDs are expensive and delicate devices and can be easily damaged if the wrong bias voltage is applied. APD and TIA circuits are sensitive to spurious outputs and from an SNR point of view, a biasing circuit must introduce minimum noise to the system. In addition, it is desirable to have a biasing circuit that can operate at 5V. Bear in mind that APDs require biasing voltage in the excess of 50V.
These requirements constitute a significant design challenge and are addressed in this post.
Figure 1 shows the schematic of a bias circuit and a photo of the assemble circuit is shown in Figure 2.
Figure 1: APD Biasing Circuit
The schematic of the APD bias circuit uses a low-noise, fixed-frequency PWM boost converter (MAX5026) with an inductor that operates in discontinuous-current mode. Maxim’s datasheet suggest that the switching times have been intentionally slowed to reduce the high-frequency spikes that are otherwise present in most cases. A slower switching time means that the high-frequency di/dt and dv/dt rates are reduced and this should minimise radiated and coupled noise to surrounding circuits.
Figure 2: Assembled APD biasing circuit
The MAX5026 switching frequency is 500kHz, and the internal, lateral-DMOS switching device has an absolute maximum rating of 40V. An external voltage-doubler network is formed by C2, C3, D1, and D2, producing output voltages up to 71V. During on-time, when L1 is charging and the LX pin is low (internal DMOS conducting), C4 transfers charge to C2. When the internal DMOS switches off, the inductor current forward biases D4 and D2. Thus, the total voltage presented to capacitor C3 is the sum of VC2 and VC4. For further information about operation of this circuit, see this link from Maxim’s Website
The noise spectrum of the APD bias circuit was measured with a spectrum analyser and compared with an Agilent B2901A source-measure unit and lead-acid batteries. The results are shown in Figure 3 below. The B2901 is by far noisier than the APD biasing circuit with high noise peak clearly visible.
Figure 3: APD bias circuit noise spectrum
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 MAXIM APPLICATION NOTE 1831: Low-Noise APD Bias Circuit